Conditional data caching using transactional memory in a multiprocessor system
US9715450B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2015 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Oct 1, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A multiprocessor system providing transactional memory. A first processor initiates a transaction which includes reading first data into a private cache of the first processor, and performing a write operation on the first data in the private cache of the first processor. In response to detecting that prior to the write operation the first data was last modified by a second processor, the first processor writes the modified first data into a last level cache (LLC) accessible by the multiple processors. The system sets a cache line state index string to indicate that the first data written into the LLC was last modified by the first processor, invalidates the first data in the private cache of the first processor, and commits the transaction to the transactional memory system. This allows more efficient accesses to the data by the multiple processors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.