Systems and methods for modeling asymmetric vias
US9715570B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 10, 2015 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Oct 8, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2115/12
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods are provided for analyzing a via. A physical representation of a via intersecting with an upper layer and a lower layer is received, the physical representation comprising: (i) a pair of pad dimensions comprising an upper pad dimension a1 and a lower pad dimension a2, and/or (ii) a pair of anti-pad dimensions comprising an upper anti-pad dimension b1 and a lower anti-pad dimension b2, where at least one of first and second conditions: (A) the first condition being a1 is different than a2, and (B) the second condition being b1 is different than b2, is true. A determination is made as to which, if any, of the conditions are true. At least one model parameter is selected based on the determination. An admittance parameter corresponding to a section of the via located between the upper and lower layers is computed using the selected model parameter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.