Patent · US Active

Efficient cache preloading

US9715715B2 · kind B2 · utility

0Cited by

3References

20Claims

0Family size

Assignee

Intel Deutschland GmbH · DE

Inventor

Michael Soegtrop · Poing, DE

Key dates

Filing date	Mar 11, 2013
Grant date	Jul 25, 2017
Priority date	—
Expiry date	Oct 7, 2033

Classification

Technology area (CPC G)Physics
CPC primaryG06T11/40
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

Methods, systems, and software are provided that may perform, for example, the following. A preload table may be determined based on a graphics item to be processed. The graphics item may comprise a plurality of graphics lines. The preload table may indicate a pattern of pixel processing and cache line preloading operations for a single one of the graphics lines. For each of the graphics lines of the graphics item, the pixels may be processed and the cache line preloading operations may be performed in accordance with the preload table.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.