Thin film transistor substrate
US9716179B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 5, 2016 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | May 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/423
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A thin film transistor substrate is disclosed, which comprises: a substrate; and plural thin film transistor (TFT) units, an insulating layer, a pixel electrode and an alignment layer sequentially disposed thereon. The TFT units comprise a gate insulating layer, an active layer and source and drain electrodes; the insulating layer has contact vias to expose the drain electrodes of the TFT units; and the pixel electrode is disposed on the insulating layer and extents to the contact vias to electrically connect with the drain electrodes. Herein, a side wall of at least one of the contact vias has a first inclined portion at a first direction and a second inclined portion at a second direction, the first direction is different from the second direction, and an inclination of the pixel electrode on the first inclined portion is different from that on the second inclined portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.