Solid STTE power controller with parallel MOSFET load sharing
US9716385B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 16, 2014 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Aug 13, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/0036
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A solid state power control (SSPC) controls flow of current from a power bus to an inductive load. The SSPC utilizes load sharing, in which a plurality of current supply paths are connected in parallel to control and share the flow of current between the power bus and the inductive load. Each current supply path includes a main power switching field effect transistor (FET); a balance resistor, and a secondary FET. The balance resistor is connected between the main FET and the load. The secondary FET shunts the balance resistor when the main FET is turned on, and allows current flow through the balance resistor during a turn-off time of the main FET. The balance resistor modulates gate-source voltage of the main FET in order to compensate for gate-source threshold differences among the main FETs that could lead to unequal current sharing during the turn-off period.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.