Asynchronous low-power analog-to-digital converter circuit with configurable thresholds
US9716512B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 10, 2016 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Mar 10, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An analog-to-digital converter circuit is described that includes register space to keep one or more values to establish upper and lower thresholds of the analog-to-digital converter. The analog-to-digital converter circuit also includes first and second comparators to compare an analog input signal against the upper and lower thresholds and to trigger an analog-to-digital conversion process in response to the analog input signal crossing one of the thresholds. The analog-to-digital converter circuit also includes first logic circuitry to discard a result of the analog-to-digital conversion process if the result is within a prior analog-to-digital conversion process's thresholds. The analog-to-digital converter circuit also includes second logic circuitry to provide the result as an output and generate an interrupt if the result is not within the prior analog-to-digital conversion process's thresholds.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.