Systems and methods for generating a common mode compensation voltage in a SAR ADC
US9716513B1 · kind B1 · utility
3Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2016 |
| Grant date | Jul 25, 2017 |
| Priority date | — |
| Expiry date | Aug 3, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/1295
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
During operation of a SAR ADC, it is possible to exceed the voltage limits of a comparator by presenting voltages at the comparator input that exceed a limited range of acceptable input voltages. The present disclosure provides a system and method such as for delivering a common mode compensation voltage such that voltages present at the comparator inputs can be within the limited range of acceptable input voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.