Apparatus and method to reduce memory power consumption by inverting data
US9720484B2 · kind B2 · utility
1Cited by
19References
26Claims
0Family size
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Key dates
| Filing date | Mar 23, 2015 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Mar 23, 2035 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are approaches to reducing a guardband (margin) used for minimum voltage supply (Vcc) requirements for memory such as cache.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.