Service and system supporting coherent data access on multicore controller
US9720742B2 · kind B2 · utility
1Cited by
15References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 15, 2014 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Oct 26, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4243
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for accessing coherent data on a controller. The system and method include a first buffer and a second buffer that each may be read from or written to and an indicator that indicates which of the first or the second buffer is read from while the other of the first or second buffers is written to. The system and method also include a read synchronization protocol that allows the coherent data to be read from the buffer that the indicator indicates is the read buffer and a write synchronization protocol that allows the coherent data to be written to the buffer that the indicator indicates is the write buffer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.