Emphasis circuit
US9722545B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 4, 2013 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Mar 4, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45594
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided is an emphasis circuit capable of obtaining a desired emphasis amount with which waveform deterioration of an output signal in a high frequency band (high frequency band deterioration) is suppressed without increasing power consumption (current consumption). In the emphasis circuit, a baseband amplifier section and a peaking amplifier section are connected in parallel to each other, and respective drive current setting sections are adjusted to adjust respective drive current values thereof so that the sum of the drive current value of the baseband amplifier section and the drive current value of the peaking amplifier section may be constant.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.