Low parasitic capacitor array
US9722622B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 22, 2016 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Apr 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/716
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The disclosure provides a capacitor array. The capacitor array includes one or more first metal plates vertically stacked parallel to each other. A second metal plate is horizontally stacked to couple one end of each first metal plate of the one or more first metal plates. One or more third metal plates are vertically stacked parallel to the one or more first metal plates. Each third metal plate of the one or more third metal plates is stacked between two first metal plates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.