Interference testing

US9722663B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Alexey Kostinsky · Nahariah, IL
• Tomer Levy · Nes Ziona, IL
• Paul S. Cheses · Nes Ziona, IL
• Danny Naiger · Even Yehuda, IL
• Theodore Z. Schoenborn · Portland, US
• Christopher P. Mozak · Beaverton, US
• Nagi Aboulenein · King City, US
• James M. Shehadi · Portland, US

Key dates

• Filing date: Mar 28, 2014
• Grant date: Aug 1, 2017
• Expiry date: Mar 28, 2034

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F7/58
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

In one example a controller comprises logic, at least partially including hardware logic, configured to implement a first iteration of an interference test on a communication interconnect comprising a victim lane and a first aggressor lane by generating a first set of pseudo-random patterns on the victim lane and the aggressor lane using a first seed and implement a second iteration of an interference test by advancing the seed on the first aggressor lane. Other examples may be described.