Method and apparatus for low jitter clock recovery in wireless display extensions
US9723342B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 21, 2011 |
| Grant date | Aug 1, 2017 |
| Priority date | — |
| Expiry date | Feb 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N21/6131
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
An approach is provided for determining a program clock reference (PCR) value validity, for avoiding inaccurate variable delay reference (VDR) values, and for avoiding a mismatch in a data packet between a sequence number and a packet number for a wireless display extension. The approach involves determining to generate a data packet carrier having an optional PCR value, a VDR) value, and a validity indicator. The approach may further involve processing the data packet carrier to determine whether the data packet carrier has the optional PCR value. The approach may also involve causing, at least in part, a surrogate PCR value to be generated based, at least in part, on a determined absence of the optional PCR value from the data packet carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.