Data processing method, apparatus, and system
US9727253B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2015 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Sep 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing method, including dividing a to-be-processed data block into multiple data subblocks, where a quantity of the multiple data subblocks is less than or equal to a quantity of banks Banks of a memory, and performing an access operation on a bank corresponding to each data subblock of the to-be-processed block, where different data subblocks of the block are corresponding to different Banks of the memory. In an embodiment of the present disclosure, a processor maps different data subblocks of a to-be-processed Block to different Banks, so that a quantity of inter-page access operations on a same Block may be reduced, thereby improving memory access efficiency when two contiguous memory access operations access different pages of a same bank.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.