Method for booting a heterogeneous system and presenting a symmetric core view

US9727345B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Eliezer Weissmann · Haifa, IL
• Rinat Rappoport · Haifa, IL
• Michael Mishaeli · Jerusalem, IL
• Hisham Shafi · Beer Sheva, IL
• Oron Lenz · Ein Carmel, IL
• Jason W. Brandt · Austin, US
• Stephen A. Fischer · Rancho Cordova, US
• Bret L. Toll · Hillsboro, US
• Inder M. Sodhi · Palo Alto, US
• Alon Naveh · Ramat HaSharon, IL
• Ganapati Srinivasa · Portland, US
• Ashish V. Choubal · Austin, US
• Scott D. Hahn · Portland, US
• David A. Koufaty · Portland, US
• Russell J. Fenger · Beaverton, US
• Gaurav Khanna · Hillsboro, US
• Eugene Gorbatov · Hillsboro, US
• Mishali Naik · Santa Clara, US
• Andrew J. Herdrich · Hillsboro, US
• Abirami Prabhakaran · Hillsboro, US
• Sanjeev S. Sahagirdar · Folsom, US
• Paul Brett · Hillsboro, US
• Paolo Narvaez · Wayland, US
• Andrew D. Henroid · Portland, US
• Dheeraj Subbareddy · Santa Clara, US

Key dates

• Filing date: Mar 29, 2013
• Grant date: Aug 8, 2017
• Expiry date: Jul 10, 2034

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A heterogeneous processor architecture and a method of booting a heterogeneous processor is described. A processor according to one embodiment comprises: a set of large physical processor cores; a set of small physical processor cores having relatively lower performance processing capabilities and relatively lower power usage relative to the large physical processor cores; and a package unit, to enable a bootstrap processor. The bootstrap processor initializes the homogeneous physical processor cores, while the heterogeneous processor presents the appearance of a homogeneous processor to a system firmware interface.