Shift register with multiple discharge voltages
US9728152B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 26, 2014 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Oct 21, 2034 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2320/0223
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A shift register for reducing size of a display apparatus through a reduction in falling edge time of a scan pulse. The shift register includes stages for sequentially outputting carry pulses and scan pulses. Each stage includes a carry output unit for generating a carry pulse, based on a first discharge voltage and a clock pulse having a low-level voltage with a level substantially equal to the first discharge voltage, and supplying the carry pulse to at least one of an upstream stage and a downstream stage, a scan output unit for generating a scan pulse, based on a second discharge voltage having a higher voltage value than the first discharge voltage and the clock pulse, and supplying the scan pulse to a corresponding gate line, and a node controller for controlling voltages at nodes connected to the carry output unit and the scan output unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.