Semiconductor component with a multi-layered nucleation body
US9728610B1 · kind B1 · utility
1Cited by
4References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Feb 5, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10H20/01335
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There are disclosed herein various implementations of a semiconductor component with a multi-layered nucleation body and method for its fabrication. The semiconductor component includes a substrate, a nucleation body situated over the substrate, and a group III-V semiconductor device situated over the nucleation body. The nucleation body includes a bottom layer formed at a low growth temperature, and a top layer formed at a high growth temperature. The nucleation body also includes an intermediate layer that is formed substantially continuously using a varying intermediate growth temperature.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.