Wafer for electrical connector
US9728903B2 · kind B2 · utility
17Cited by
1References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Apr 28, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01R13/6471
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A daughter card is constructed with a housing and a plurality of wafers retained in the housing. Each wafer includes a lead frame having a plurality of signal and ground terminals where the signal terminals are a differential pair. The lead frame includes an insulative frame portion with a conductive shield positioned on a side of the lead frame. The shield is secured to the lead frame by a projection extending from the shield to the ground terminals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.