Reducing latency in video encoding and decoding
US9729898B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jul 1, 2016 |
| Grant date | Aug 8, 2017 |
| Priority date | — |
| Expiry date | Jul 1, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N19/184
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Techniques and tools for reducing latency in video encoding and decoding by constraining latency due to reordering of video frames, and by indicating the constraint on frame reordering latency with one or more syntax elements that accompany encoded data for the video frames. For example, a real-time communication tool with a video encoder sets a syntax element that indicates a constraint on frame reordering latency, which is consistent with inter-frame dependencies between multiple frames of a video sequence, then outputs the syntax element. A corresponding real-time communication tool with a video decoder receives the syntax element that indicates the constraint on frame reordering latency, determines the constraint on frame reordering latency based on the syntax element, and uses the constraint on frame reordering latency to determine when a reconstructed frame is ready for output (in terms of output order).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.