Patent · US Active

Flash memory controller

US9733857B2 · kind B2 · utility

8Cited by
2References
12Claims
0Family size

Assignee

Inventors

Key dates

Filing dateAug 12, 2016
Grant dateAug 15, 2017
Priority date
Expiry dateAug 12, 2036

Classification

  • Technology area (CPC Y)Emerging Cross-Sectional Technologies
  • CPC primaryY02D10/00
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.