Multi-bit full adder based on resistive-switching devices and operation methods thereof
US9733900B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 31, 2013 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Dec 31, 2033 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present disclosure discloses a full adder based on resistive-switching devices and an operation method thereof. A multi-bit full adder circuit is constituted by using a cross-bar array of resistive-switching devices, wherein data of standard sums is stored on the principle diagonal of the cross-bar array in a nonvolatile manner, and carry data is stored in adjacent units on both sides of the principle diagonal. The carry data is stored according to whether the storage loop (crosstalk loop) is turned on. With the present disclosure, the multi-bit full adder circuit is significantly simplified. Thereby, additional circuits for generating a carry signal are reduced, the circuit delay and chip area are decreased, and the adder has an ability of nonvolatile storage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.