Microprocessor, and method of managing reset events therefor
US9733952B2 · kind B2 · utility
0Cited by
13References
20Claims
0Family size
Assignee
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Key dates
| Filing date | Feb 27, 2012 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Jul 2, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A microprocessor comprises at least one reset management module. The at least one reset management module is arranged to detect a reset event, determine if at least one reset condition has been met upon detection of the reset event, and cause at least a part of the microprocessor to remain in a reset state upon determining that the at least one reset condition has been met.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.