Semiconductor device structure and manufacturing method
US9735123B2 · kind B2 · utility
4Cited by
4References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 13, 2014 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Jun 21, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device structure and a manufacturing method are provided. The method includes forming a conductive pillar over a semiconductor substrate. The method also includes forming a solder layer over the conductive pillar. The method further includes forming a water-soluble flux over the solder layer. In addition, the method includes reflowing the solder layer to form a solder bump over the conductive pillar and form a sidewall protection layer over a sidewall of the conductive pillar during the solder layer is reflowed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.