Circuit and method of operating circuit
US9735764B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jan 4, 2016 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Jan 4, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00195
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A circuit includes a first switch, a second switch, a first delay circuit and a second delay circuit. The first switch includes a first terminal, and the second switch includes a second terminal. The first delay circuit is coupled to the first terminal and the second terminal. The first delay circuit is configured to alternately turn ON the first switch and the second switch in accordance with an input signal and with a delay between successive ON times of the first switch and the second switch. The second delay circuit is coupled to the first terminal and the second terminal. The second delay circuit is configured to control the first delay circuit to generate the delay in accordance with a stored setting of the delay, a first voltage on the first terminal, or a second voltage on the second terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.