Techniques for interference mitigation in directional multi-gigabit networks
US9736857B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2014 |
| Grant date | Aug 15, 2017 |
| Priority date | — |
| Expiry date | Mar 1, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04W72/20
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Techniques for interference mitigation in directional multi-gigabit networks are described. In one embodiment, for example, an apparatus may comprise logic, at least a portion of which is in hardware, the logic to send, from a source device, a first reverse direction grant (RDG) indicating that a sink device may transmit to the source device, detect interference with a received sink device data transmission at the source device, select a grant deferral period, and upon conclusion of the grant deferral period, send a second RDG indicating that the sink device may transmit to the source device. Other embodiments are described and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.