Dynamic biasing for regulator circuits
US9740224B2 · kind B2 · utility
2Cited by
9References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2015 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Oct 19, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F1/565
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
The disclosed invention provides apparatus and methods for dynamic biasing in electronic systems and circuits. The apparatus and methods disclosed provide non-linear biasing responsive to monitored load conditions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.