Patent · US Active

Multi-step incremental switching scheme

US9740351B2 · kind B2 · utility

4Cited by

9References

20Claims

0Family size

Assignee

Synaptics Incorporated · US

Inventors

Zheming Li · Bayreuth, DE
Saikrishna Ganta · Milpitas, US
Tae-Song Chung · Danville, US
Rafael Betancourt · Santa Clara, US
John Weinerth · San Jose, US
Farzaneh Shahrokhi · San Jose, US

Key dates

Filing date	Sep 30, 2015
Grant date	Aug 22, 2017
Priority date	—
Expiry date	Nov 25, 2035

Classification

Technology area (CPC G)Physics
CPC primaryG06F2203/04108
WIPO fieldComputer technology
WIPO sectorElectrical engineering

Abstract

A capacitance measurement circuit cancels background capacitance while reducing charge leakage and supply ripples during reset phases and integrate phases. The capacitance measurement circuit operates a first switch into a linear mode causing a first resistance in the first switch, and after a delay, operates a second switch into a saturation mode causing a second resistance in parallel to the first resistance.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.