Processing device and method for performing a stage of a Fast Fourier Transform
US9740663B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 21, 2014 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Apr 30, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F17/142
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A data processing device and a method for performing second or next stage of an N point Fast Fourier Transform is suggested. The processing device comprises an input operand memory unit and an input buffer comprising a plurality of addressable memory cells arranged in lines and columns. Furthermore, the device comprises a number of radix-P operation units for producing output operands that are buffered in an output buffer. Input operands are read from the input operand memory unit and buffering into the input buffer. The input operands are stored and fetched from the input buffer according to a reordering scheme that allows efficient parallel processing of the operands by the butterflies and the buffering of subsequent input operands.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.