Capacitor array and method of manufacture
US9741494B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2014 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Aug 10, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/43
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
An improved array of capacitors is provided wherein the improvement includes improved electrical properties and improved packing density. The array has an anode foil and a dielectric on a surface of the anode foil. A multiplicity of areas are defined on the dielectric wherein each area is circumvented by an isolation material and the isolation material extends through the dielectric. A conductive cathode layer in each area forms a capacitive couple. At least one substrate vacancy is in the anode foil and the substrate vacancy electrically isolates adjacent anodes of adjacent capacitive couples. A carrier film is attached to the capacitive couples.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.