Display panel including static electricity preventing pattern and display device having the same
US9741747B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2017 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Jan 26, 2037 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D89/931
Abstract
A display device comprising a display panel that includes an active area, the active area including a data line positioned on a substrate in a first direction and transferring a data signal, a gate line positioned on the substrate in a second direction and transferring a gate signal, a thin film transistor connected to the gate line and the data line, and a plurality of pixels driven by the thin film transistor, a first pad coupled to a first signal line disposed in a data signal area wherein the first signal line is connected to the data line, and a first non-signal line disposed in a first non-signal area wherein the first non-signal line is disconnected from the data line, the first non-signal area being disposed outside the data signal area, a second pad coupled to a second signal line disposed in a gate signal area wherein the second signal line is connected to the gate line, and a second non-signal line disposed in a second non-signal area wherein the second non-signal line is disconnected from the gate line, the second non-signal area being disposed outside the gate signal area; and a dummy pattern disposed between the data signal area and the first non-signal area, or dispo…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.