Semiconductor device with false drain

US9741793B2 · kind B2 · utility

Assignee

• NXP USA, Inc. · US

Inventors

• Patrice M. Parris · Phoenix, US
• Weize Chen · Phoenix, US

Key dates

• Filing date: Apr 16, 2012
• Grant date: Aug 22, 2017
• Expiry date: Jul 1, 2035

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/111

Abstract

An electronic apparatus includes a semiconductor substrate and first and second transistors disposed in the semiconductor substrate. The first transistor includes a channel region and a drain region adjacent the channel region. The second transistor includes a channel region, a false drain region adjacent the channel region, and a drain region electrically coupled to the channel region by a drift region such that the second transistor is configured for operation at a higher voltage level than the first transistor. The respective channel regions of the first and second transistors have a common configuration characteristic.