Integrated circuits resistant to electrostatic discharge and methods for producing the same
US9741849B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2016 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Apr 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/116
Abstract
Integrated circuits and methods of producing such integrated circuits are provided. In an exemplary embodiment, an integrated circuit includes a heavily doped source area having conductivity determining impurities at a heavily doped source concentration and a lightly doped drain area having conductivity determining impurities at a lightly doped drain concentration less than the heavily doped source concentration. A drain conductor directly contacts the lightly doped drain area, and a channel is positioned between the heavily doped source area and the lightly doped drain area. A gate overlies the channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.