Nano-scale superconducting quantum interference device and manufacturing method thereof
US9741919B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 8, 2014 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Apr 8, 2034 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10N60/0912
Abstract
A nano-scale superconducting quantum interference device and a manufacturing method thereof, comprising the following steps of: S1: providing a substrate and growing a first superconducting material layer thereon; S2: forming a photo-resist layer and performing patterning; S3: etching the first superconducting material layer in a predetermined region; S4: covering a layer of insulation material on a top and a side of a structure obtained in step S3; S5: growing a second superconducting material layer; S6: removing the structure above the plane where the upper surface of the first superconducting material layer locates, to obtain a plane superconducting structure, in the middle of which at least one insulating interlayer is inserted; S7: forming at least one nanowire vertical to the insulating interlayer, to obtain the nano-scale superconducting quantum interference device. The width of the superconducting ring and the length of the nano junction are determined by the insulating interlayer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.