Method for processing an electronic component and electronic component arrangement
US9741965B2 · kind B2 · utility
0Cited by
0References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 13, 2014 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Jun 13, 2034 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
Abstract
Various embodiments may relate to a method for processing an electronic component. The method includes applying a planar structure provided with predetermined separation locations to the electronic component, and removing a part of the applied planar structure, wherein removing includes separating the planar structure at the predetermined separation locations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.