Image sensor with switchable biasing arrangement
US9743023B2 · kind B2 · utility
2Cited by
3References
11Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 26, 2015 |
| Grant date | Aug 22, 2017 |
| Priority date | — |
| Expiry date | Jan 26, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/77
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
In an image sensor, a photo detector circuit applies a photo current to a capacitive node during a photo detection time interval. A front-end circuit comprises an input transistor having a control node that is coupled to the capacitive node. A switchable biasing arrangement puts the input transistor in a disabled state during the photo detection time interval. The input transistor is put in an enabled state after the photo detection time interval. This then causes the front-end circuit to provide an output signal that is representative of a voltage on the capacitive node after the photo detection time interval.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.