Apparatus for voltage detection in an integrated circuit
US9746501B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Sep 29, 2014 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Sep 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/40
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A voltage detector to detect the voltage level of a switched power supply associated with a power gated region of an integrated circuit. The voltage detection circuit, which can be described as a modified Schmitt trigger circuit, comprises PMOS and NMOS transistors, and an added stack of NMOS transistors to set the output to a value of 1 in response to detection of an input voltage at the input greater than an operational voltage of the switched power supply, for example approximately 80% VDD and above. A pull-down circuit actively pulls the circuit output low before the circuit input drops below the low input threshold. Optional additional NMOS transistors provide the capability to adjust the threshold. The voltage detector circuit can be calibrated and used to detect whether or not the switched power supply associated with a power gated design has reached its operational voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.