Utilizing pipeline registers as intermediate storage
US9747104B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2014 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Nov 17, 2035 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3875
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one example, a method includes responsive to receiving, by a processing unit, one or more instructions requesting that a first value be moved from a first general purpose register (GPR) to a third GPR and that a second value be moved from a second GPR to a fourth GPR, copying, by an initial logic unit and during a first clock cycle, the first value to an initial pipeline register, copying, by the initial logic and during a second clock cycle, the second value to the initial pipeline register, copying, by a final logic unit and during a third clock cycle, the first value from a final pipeline register to the third GPR, and copying, by the final logic unit and during a fourth clock cycle, the second value from the final pipeline register to the fourth GPR.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.