Intelligent refresh of 3D NAND
US9747158B1 · kind B1 · utility
9Cited by
63References
11Claims
0Family size
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Key dates
| Filing date | Jan 13, 2017 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Jan 13, 2037 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/0483
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for processing blocks of flash memory to decrease raw bit errors from the flash memory is provided. The method includes identifying one or more blocks of the flash memory for a refresh operation and writing information regarding the identified blocks, to a data structure. The method includes issuing background reads to the identified blocks, according to the data structure, as the refresh operation. The method may be embodied on a computer readable medium. In some embodiments the background reads may be based on a time based refresh responsive to an increase in raw bit error count in the flash memory over time.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.