Methods, apparatus, and systems for secure demand paging and other paging operations for processor devices
US9747220B2 · kind B2 · utility
2Cited by
22References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 14, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Apr 14, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A secure demand paging system includes a secure internal memory having a table relating physical addresses to virtual addresses, a non-volatile memory, a decryption module and a hash module between the secure memory and the non-volatile memory to allow for decryption and integrity verification of data stored in the non-volatile memory during a transfer to said secure memory and means for connecting the secure memory to a volatile page swap memory such that the non-volatile memory is bypassable during a page swap.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.