Thin film transistor and method of fabricating the same, array substrate and method of fabricating the same, and display device
US9748280B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 8, 2015 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Jan 8, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10K59/1213
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
The present invention provides a thin film transistor and a method of fabricating the same, an array substrate and a method of fabricating the same, and a display device. The thin film transistor comprises a gate, a source, a drain, a gate insulation layer, an active layer, a passivation layer, a first electrode connection line and a second electrode connection line. The gate, the source and the drain are provided in the same layer and comprise the same material. The gate insulation layer is provided above the gate, the active layer is provided above the gate insulation layer, and a pattern of the gate insulation layer, a pattern of the gate and a pattern of the active layer coincide with each other. The passivation layer covers the source, the drain and the active layer, and the passivation layer has a first via hole corresponding to a position of the source, a second via hole corresponding to a position of the drain, and a third via hole and a fourth via hole corresponding to a position of the active layer provided therein. The first electrode connection line connects the source with the active layer through the first via hole and the third via hole, and the second electrode conn…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.