Fast clock and data recovery for free-space optical communications
US9749123B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 8, 2016 |
| Grant date | Aug 29, 2017 |
| Priority date | — |
| Expiry date | Jun 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/10
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method includes receiving an optical signal through an optical link and determining a receiving power for the optical link. The method further includes comparing the receiving power for the optical link to a first receiving power threshold and transitioning a clock and data recovery circuit form a normal mode to a holdover mode when the receiving power is less than the first receiving power threshold. The clock and data recovery circuit, when operating in the holdover mode, configured to hold a recovered clock to a known-good clock frequency. When the receiving power for the optical link is greater than a second receiving power threshold, the method initiates a transition of the clock and data recovery circuit from the holdover mode to the normal mode and reacquires synchronization between the recovered clock and a current rate of the incoming data stream using the known-good clock frequency.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.