Controlling a refresh mode of a dynamic random access memory (DRAM) die
US9754655B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 1, 2016 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Nov 1, 2036 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/50
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an embodiment, a dynamic random-access memory (DRAM) system configures an inactive portion of a DRAM die to operate in accordance with a self-refresh mode that is characterized by refreshes of the DRAM die being controlled by a local DRAM die controller integrated into the DRAM die. The DRAM system also configures an active portion of the DRAM die to operate in accordance with a controller-managed refresh mode while the inactive portion of the DRAM die operates in the self-refresh mode, the controller-managed refresh mode characterized by refreshes of the DRAM die being controlled by a controller that is external to the DRAM die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.