Patent · US Active

Semiconductor wafer and method of producing the same

US9754832B2 · kind B2 · utility

3Cited by

3References

19Claims

0Family size

Assignee

NXP B.V. · NL

Inventors

Florian Schmitt · Bonn, DE
Heimo Scheucher · Langegg, AT
Michael Ziesmann · Hamburg, DE

Key dates

Filing date	May 17, 2012
Grant date	Sep 5, 2017
Priority date	—
Expiry date	Jul 15, 2033

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/0002
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A semiconductor wafer (100) having a regular pattern of predetermined separation lanes (102) is provided, wherein the predetermined separation lanes (102) are configured in such a way that the semiconductor wafer is singularizable along the regular pattern.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.