Electronic device furnished with a conducting layer and method of fabrication
US9754853B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Feb 22, 2016 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Feb 22, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic device includes a support board having a mounting face and an integrated circuit chip mounted on the mounting face. An encapsulation block embeds the integrated circuit chip, the encapsulation block extending above the integrated circuit chip and around the integrated circuit chip on the mounting face of the support board. The encapsulation block includes a front face with a hole passing through the encapsulation block to uncovering at least part of an electrical contact. A layer made of an electrically conducting material fills the hole to make electrical connection to the electrical contact and further extends over the front face of the encapsulation block.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.