Non-volatile semiconductor devices
US9754959B2 · kind B2 · utility
1Cited by
2References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 9, 2015 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Dec 9, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
Abstract
A semiconductor device is provided as follows. A tunnel insulation layer is disposed on a substrate. The tunnel insulation layer includes a first silicon oxide layer, a second silicon oxide layer, and a silicon layer interposed between the first silicon oxide layer and the second silicon oxide layer. The silicon layer has a thickness smaller than a thickness of each of the first silicon oxide layer and the second silicon oxide layer. A gate pattern is disposed on the tunnel insulation layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.