Virtual performance monitoring decoupled from hardware performance-monitoring units
US9756118B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 28, 2014 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Jun 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L67/1097
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The current document is directed to virtualized PMUs provided by virtualization layers. The currently disclosed virtualized PMUs are decoupled from the underlying PMU hardware features of processors on which the virtualization layer executes. The decoupling is achieved, in part, by time multiplexing the underlying hardware PMU registers to provide a greater number of virtualized PMU registers than the number of hardware-PMU registers provided by at least some of the underlying hardware PMUs. The decoupling is also achieved by providing for monitoring, by the virtualized PMU registers, of computed processor events and approximated processor events in addition to the processor events monitored by the underlying hardware PMUs. In addition, the virtualized PMU registers are implemented, in certain implementations, to support a variety of different monitoring modes, including monitoring of processor events that occur only during execution of the virtualization layer and monitoring of hardware-thread-specific processor events.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.