Multi-tiered tamper-resistant assembly system and method
US9756273B2 · kind B2 · utility
0Cited by
2References
10Claims
0Family size
Assignee
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Key dates
| Filing date | Mar 4, 2015 |
| Grant date | Sep 5, 2017 |
| Priority date | — |
| Expiry date | Aug 28, 2035 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10F39/1843
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A multi-tiered approach to combating reverse engineering of electronics is disclosed herein. The encapsulant utilized with the optical sensor may be selected based on being substantially being opaque to X-ray inspection. In this way, visible public inspection to gain competitive intelligence may be reduced and operation of the electronics may remain unaffected. Additionally, a thin filament of wire embedded just below the surface of the encapsulant could be used as an electronic tripwire in response to being severed and/or dissolved by the reverse engineering strong solvents and acids.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.