Register files for storing data operated on by instructions of multiple widths

US9760375B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Maarten J. Boersma · Holzgerlingen, DE
• Markus Kaltenbach · Holzgerlingen, DE
• David Lang · Lörrach, DE
• Jentje Leenstra · Nagold, DE

Key dates

• Filing date: Sep 9, 2014
• Grant date: Sep 12, 2017
• Expiry date: May 15, 2035

Classification

• Technology area (CPC G): Physics
• CPC primary: G06F9/3891
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A processor core includes even and odd execution slices each having a register file. The slices are each configured to perform operations specified in a first set of instructions on data from its respective register file, and together configured to perform operations specified in a second set of instructions on data stored across both register files. During utilization, the processor receives a first instruction of the first set specifying an operation, a target register, and a source register. Next, a second instruction upon which content of the source register depends is identified as being of the second set. In response, the first instruction is dispatched to the even slice. In accordance with the operation specified in the first instruction, the even slice uses content of the source register in its register file to produce a result. Copies of the result are written to the target register in both register files.