Operation method of memory controller and nonvolatile memory system including the memory controller
US9760503B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 10, 2015 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | Apr 29, 2036 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/7201
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory system includes a nonvolatile memory device having a physical storage area, and a memory controller managing the physical storage area on the basis of first and second logical areas. The memory controller is configured to receive a logical block address range corresponding to a part of the first logical area and a command from a host and is configured to receive data, a logical block address and a write command from the host to perform an update with respect to the second logical area. When, in the update operation, the received logical block address is included in the logical block address range, the memory controller, in response to the write command, redirects the received logical block address to a logical page number of the second logical area so that the data is written in the second logical area.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.