Power semiconductor device with a double metal contact and related method
US9761550B2 · kind B2 · utility
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1References
18Claims
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Key dates
| Filing date | Apr 13, 2016 |
| Grant date | Sep 12, 2017 |
| Priority date | — |
| Expiry date | May 8, 2036 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/258
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A power semiconductor device that includes a stack of a thin metal layer and a thick metal layer over the active region thereof, and a method for the fabrication thereof.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.